EDA Simulator Link DS 2.0
for Synopsys Discovery

Cosimulate and verify VHDL® and Verilog® using Synopsys Discovery VCS™ MX

Elaboration of a floating-point reference algorithm and verification of a Verilog implementation using a cosimulation interface.

EDA Simulator Link™ DS is a cosimulation interface that provides a bidirectional link between MATLAB® and Simulink® and the Synopsys® Discovery™ VCS™ MX family of simulators. This product enables you to use MATLAB or Simulink with Synopsys Discovery for efficient verification of HDL code. It provides native cosimulation support for VHDL®, Verilog®, and mixed-language designs.

Introduction and Key Features
Working with EDA Simulator Link DS
Typical Applications
Using EDA Simulator Link DS with MATLAB
Using EDA Simulator Link DS with Simulink

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Press Release: The MathWorks Expands Product Portfolio for Electronic System Verification

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EDA Simulator Link DS 2.0
for Synopsys Discovery

Cosimulate and verify VHDL® and Verilog® using Synopsys Discovery VCS™ MX

Get Pricing and
Licensing Options

Free Seminar

EDA Simulator Link DS 2.0 for Synopsys Discovery

Cosimulate and verify VHDL® and Verilog® using Synopsys Discovery VCS™ MX

Get Pricing andLicensing Options

Free Seminar

EDA Simulator Link DS 2.0
for Synopsys Discovery

Get Pricing and
Licensing Options